SAN FRANCISCO, CA — (Marketwire) — 05/31/12 –At the (DAC), , a leading provider of EDA software that accelerates field-programmable gate array (FPGA) implementation, will showcase its Blue Pearl Software Suite-s interoperability with tools and flows from other leading FPGA ecosystems players — Xilinx Vivado Design Suite and Synopsys Synplify Pro FPGA synthesis software.The provides Register Transfer Level (RTL) analysis and includes linting, clock domain crossing (CDC) and automatic Synops
Demos Set for Design Automation Conference, June 4-6, San Francisco, Booth 2900