CAMPBELL, CA — (Marketwire) — 05/24/12 — , Inc. (SFT) an Electronic Design Automation (EDA) company, in the 3D parasitic extraction and analysis software market, announced new versions of its flagship products, (Fast 3D) for fast 3D extraction and (Resistive 3D) for 3D extraction and analysis of large resistive structures, and a new product (Pont-to-Point) for IR drop analysis.
F3D: Increased speed & capacity F3D is chosen for its nanometer and A/MS design verification accuracy. To address the growing complexity of today-s nanometer designs, F3D is now faster and handles larger designs. A new segment mode provides better performance improvement as circuit size increases. F3D has improved handling of active and passive devices in addition to support of co-planar structures. These capabilities provide support for newer and more complex geometries.
F3D benefits include:
Better performance for larger designs
Analysis of larger (unlimited) size designs
Improved handling of active and passive devices for new technology nodes
R3D: Layer-by-layer comparisons, transient-gate analysis R3D is used for analysis that improves the reliability and efficiency of semiconductor power devices. R3D has been adopted by over 20 customers and applied to MOS, DMOS, LDMOS, vertical DMOS, waffle-style and GaN HEMT designs.
The new version of R3D allows for easy comparison of design enhancements both graphically and with a new layer-by-layer resistance report. If design changes are made, the analysis includes the impact on RDson and current density.
A new option supports transient analysis of gate networks, which allows for switching optimization. As power devices become larger, managing gate switching is critical to ensure correct operation. R3D Gate extracts and analyzes the gate network providing graphical and textual results. Issues are quickly identified and resolved ensuring proper operation of the device is achieved.
Point-to-Point Resistance Analysis Silicon Frontline is delivering its new P2P product for point-to-point or multipoint to multipoint resistance analysis and fast, static IR drop analysis.
Monday-Wednesday, June 4-6, 2012 9 am to 6 pm Booth #2900 Moscone Convention Center, San Francisco, California To make an appointment, please email .
, Inc. provides post-layout verification software that is Guaranteed Accurate and works with existing design flows from major EDA vendors. Using new 3D technology, the company-s software products improve silicon quality for standard and advanced nanometer processes. For more information please visit . For sales or general assistance, please email .
Notes to editors: Acronyms and Definitions A/MS: Analog Mixed Signal DMOS: Double-diffused Metal Oxide Semiconductor EDA: Electronic Design Automation F3D: Fast 3D GaN: Gallium Nitride HEMT: High Electron Mobility Transistor IR Drop Voltage Drop Analysis LDMOS: Laterally Diffused Metal Oxide Semiconductor MOS: Metal Oxide Semiconductor R3D: Resistive 3D Rdson: Resistance from drain to source
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Press Contact: Georgia Marszalek ValleyPR LLC +1 650 345 7477
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