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Accellera Systems Initiative Launches Working Group to Standardize Interoperability of Multiple Language Verification Environments and Components 0

Industry Invited to Join Standardization Initiative

John Aynsley Is First to Receive Accellera Systems Initiative Technical Excellence Award 0

Mr. Aynsley Will Be Recognized for Contributions to SystemC at Organization-s DVCon on February 27, 2012

Accellera Systems Initiative Announces IEEE 1666(TM) SystemC(TM) Language Standard for Electronic System-Level Design Is Available for Download at No Charge 0

SystemC Supports Efficient, High-Level Design of Complex Integrated Circuits and Systems-on-Chips

Accellera Systems Initiative Announces „Accellera Systems Initiative Day“ at Its 2012 Design and Verification Conference and Exhibition (DVCon) 0

Sessions on Monday, February 27, 2012 at the DoubleTree Hotel, San Jose, Calif. Focus on EDA & IP Standards

ASSET brings JTAG test tools perspective to IEEE 1149.7 0

Richardson, TX/Munich (September 11, 2008) – ASSET® InterTech (www.asset-intertech.com), the leading supplier of open tools for embedded instrumentation, has assumed a principal role in the development of IEEE 1149.7 as one of the founding members of the working group that is defining the emerging standard, which will be ratified in early 2009.