Supports Growing Market in FPGA Design Software
SANTA CLARA, CA and TOKYO — (Marketwire) — 12/13/12 — , the provider of EDA software that accelerates RTL signoff for FPGA designs, today announced it has opened a Japan office in Tokyo, and appointed as its Director of Sales."By opening this office and adding an experienced executive like Sakano to our management team, we continue to support our growing list of Japanese FPGA designers," said Ellis Smith, Blue Pearl-s CEO."We are dedicated to providing FPGA designers in Japan
SUNNYVALE, CA — (Marketwire) — 05/29/12 — ., the leading provider of software products that accelerate Early Functional Verification and Advanced Sign-off of electronic designs, announced today the release of version 4.1 of its (CDC) analyzer and the release of version 1.5.1 of its tool. These new releases provide significant advances over the 2011 versions of the software.Real Intent-s software products solve challenging SoC verification and sign-off design problems with speed that no ot
