SANTA CLARA, CA — (Marketwire) — 10/20/11 — ARM TechCon 2011, October 25, Santa Clara, CA
, Inc., the leader in Electronic System Level (ESL) hardware design and Register Transfer Level (RTL) power optimization, announced that Nikhil Sharma, Vice President of Applications Engineering and Services, will speak on Formal Verification of RTL Changes for Intellectual Property (IP) Hardening at 2011, in Santa Clara, CA, USA, Tuesday, October 25. In addition, during the ARM TechCon Expo on the same day, Calypto representatives will be available to talk about its software platforms, HLS (High Level Synthesis), (Sequential Logic Equivalence Checking) and , which enable ESL design, dramatically improve design quality and reduce power consumption of System-On-Chip (SOC) devices.
Tuesday, October 25, 2011, 4:10pm-5:00pm Room 207 Formal Verification of RTL Changes for IP Hardening
Exhibit Tuesday, October 25, 2011, 10:15am-7pm Stand #5 Santa Clara Convention Center Santa Clara, CA, USA
For more information about ARM TechCon, please visit . For more information about Calypto please visit at . To make an appointment with Calypto at ARM TechCon, please email .
, Inc. is the leader in ESL hardware design and RTL power optimization. Calypto, whose customers include Fortune 500 companies worldwide, is a member of the ARM Connected Community, Cadence Connections program, the IEEE-SA, Synopsys SystemVerilog Catalyst Program, the Mentor Graphics OpenDoor program, Si2 and is an active participant in the Power Forward Initiative. Calypto has offices in Europe, India, Japan and North America.
More information can be found at .
Catapult, Calypto, PowerPro and SLEC are trademarks of Calypto Design Systems Inc. All other trademarks are property of their respective owners.
Press Contact: Georgia Marszalek ValleyPR, LLC for Calypto +1-650.345.7477
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