SAN JOSE, CA — (Marketwired) — 09/29/14 —
, the SPICE modeling solutions leader and provider of the first giga-scale SPICE simulator and unique Design-for-Yield (DFY) solutions
Will demonstrate NanoSpice Giga, the first giga-scale SPICE simulator to handle memory circuits with more than one-billion elements with a pure SPICE engine, and other FinFET-ready DFY solutions at the TSMC Open Innovation Platform® (OIP) Ecosystem Forum Pavilion. To be highlighted is its NanoSpice parallel SPICE simulator that recently achieved TSMC–s device level SPICE model certification for its 16-nanometer (nm) FinFET manufacturing process.
Tuesday, September 30, from 8 a.m. until 6 p.m.
San Jose McEnery Convention Center, San Jose, Calif.
More information about ProPlus Design Solutions can be found at:
To learn more about at the OIP Ecosystem Forum, go to:
delivers Electronic Design Automation (EDA) solutions with the mission to enhance the link between design and manufacturing. As the SPICE modeling solutions leader and leading technology provider of giga-scale SPICE simulation and design for yield (DFY) applications, it provides unique DFY solutions integrating the most advanced device modeling, a high-performance parallel SPICE simulation engine and hardware-validated variation analysis technologies. Founded in 2006, ProPlus Design Solutions has R&D centers in the San Jose, Calif., Beijing and Jinan, China, and offices in Tokyo, Japan, Hsinchu, Taiwan, and Shanghai, China. More information about ProPlus Design Solutions can be found at .
BSIMProPlus, Model Explorer, NanoExplorer, NanoSpice, NanoYield and NoisePro are registered trademarks of ProPlus Design Solutions. ProPlus Design Solutions acknowledges trademarks or registered trademarks of other organizations for their respective products and services.
For more information, contact: Nanette Collins Public Relations for ProPlus Design Solutions (617) 437-1822
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